Hardware Reference — Orange Pi RV2, ESP32-S3, RPi3, and RPi4
Orange Pi RV2
ProcessorKy X1 8-core RISC-V
RAM8GB LPDDR4X
OSUbuntu 24.04 LTS
SPI RoleMaster
ESP32-S3
BoardLonely Binary N16R8 Gold
MCUDual-Core Xtensa @ 240 MHz
Flash / PSRAM16MB / 8MB
WiFi2.4 GHz 802.11 b/g/n
USBOTG Host (MSC) + VCOM workflow
SPI RoleSlave
Raspberry Pi 3 Backup Target
BoardRaspberry Pi 3 Model B v1.2
CPUQuad-core ARM Cortex-A53
OSDebian 13 / RPi OS Lite style
RoleOff-device backup sink
Primary PathFTPS from Orange Pi
AdminSSH / Tailscale
Raspberry Pi 4 OpenClaw
BoardRaspberry Pi 4
CPUQuad-core ARM Cortex-A72
RuntimeNode 22 + OpenClaw
RoleOpenClaw / Discord host
Public UI/overview via Tailscale
CoordinationRemote with Orange Pi
Software Reference — runtime stacks, firmware, services, and OS versions
Board
OS
Main runtime
Version
Role
Orange Pi RV2
Ubuntu 24.04 LTS
nginx + FastAPI + uvicorn
nginx 1.24.0; Python live on status card
Gateway UI, API, Tailscale Funnel entry point
ESP32-S3
ESP-IDF firmware target
usb_host_platformio
ESP-IDF v5.3.1
USB host, OTA, VCOM, SPI target device
RPi3 Backup Target
Debian GNU/Linux 13 (trixie)
vsftpd
kernel 6.12.47+rpt-rpi-v8
Off-device clone sink over FTPS
RPi4 OpenClaw
Pi-hosted OpenClaw runtime
OpenClaw + Node.js
OpenClaw v2026.3.7; Node v22.22.0; npm 10.9.4
Chat, Discord, memory/orchestration host
SPI Configuration
SPI Response Format
Response format:00deadbeef
First byte (00) = Status code
Remaining bytes (deadbeef) = Payload data
Status Codes
Code
Meaning
Description
00
OK
Command succeeded
e0
Error
General error
e1
CRC Error
CRC validation failed
e2
Timeout
Command timed out
e3
Invalid Command
Unknown command byte
Example: PING Response
00deadbeef means:
00 = Command succeeded
deadbeef = Signature confirming ESP32 is responding
SPI Status & Control
Device-
Speed-
Status-
Driver-
Target-
HealthUnknown
Bus / Dev-
Transport-
CRC-
Last PingNever
Latency-
Last Response-
Ping Counters0 ok / 0 fail
Fail Streak0
Last Error-
USB Mode
Current Mode—
Last SPI Read—
⚠ SET MODE writes to NVS and reboots ESP32 (~300 ms delay). After VCOM reboot, swap OTG cable to PC — a new COM port will appear.
ESP32 UART Reset
Last UART ResetIdle
Runs esptool on the Orange Pi against the ESP32 UART link. It asserts default_reset, probes the ROM loader, then exits with hard_reset back to the app.
SPI Configuration
Custom Config
File Management
Stage files on the Orange Pi for deployment workflows — upload firmware blobs for OTA flashing, configuration patches, or build artifacts. Files are kept in ~/Orange_Pi_RV2/data/files and are accessible via the REST API.
Storage Overview
Live disk and file-count stats for the Orange Pi staging directory. Refreshed automatically after every upload or delete.
0staged files
0 Bused
-disk free
-disk usage
Upload a File
Drop a file below to stage it on the Orange Pi. Typical use cases: ESP32 firmware .bin for OTA flashing via the ESP32 OTA page, .json config patches, or driver build artifacts. No size limit — only free disk space applies.
📁
Drag & drop files here or click to browse
No size limit — only free disk space applies
Staged Files
All files currently in the staging directory. Download or delete individual files, or use /api/files/<filename> to reference them in automation scripts and OTA workflows.